A few years ago, a small number of people accessed primarily text-based information through the Internet. Today, motion video and sound combined with a huge increase in users have pushed the internet infrastructure and the performance of communications equipment to the limit. The explosive demands from the Internet are driving the need for higher speed integrated circuits. As the speed of integrated circuits increases, higher bandwidth buses interconnecting the integrated circuits are needed.
The traditional ways to increase the bandwidth of a bus are to increase bus width and bus clock frequency. Increasing bus width is effective to a point. But eventually, this solution runs into the problem of requiring too many pins. Pins add cost: pins take board area, increase package costs and size, increase test costs and affect electrical performance. Increasing bus width also makes length-matching signal traces, which is required in many high performance systems, more difficult.
Increasing bus clock frequency is effective but only to a point beyond which it becomes challenging to support reliable data transfer using standard printed circuit board (PCB) technology and standard manufacturing processes. For instance, high frequency clock chips are expensive and difficult to build, and there is more electrical loss on the boards interconnecting the chips. Other electromagnetic problems such as cross-talk are more likely to materially affect signal transmission at very high frequency.
In some electronics systems, differential signaling technologies (e.g., differential LVDS) are used to communicate data between integrated circuits. Differential signaling technologies typically require complex circuitry that consumes large die areas and large amounts of power. For example, an implementation of a differential LVDS link can require 6.2×106 μm2 of die area and consume more than 1.7 Watts of power. Furthermore, differential signaling technologies are difficult to implement because they often require one or more Phase-Locked Loops (PLL) or Delay-Locked Loops (DLL) as well as some additional complex analog circuits. In addition, differential signaling technologies require careful isolation because they tend to be sensitive to core switching noise.
Accordingly, what is needed is a high speed interconnect between integrated circuits that does not require a high pin count, large die areas and large amounts of power. What is further needed is a high speed interconnect that can be implemented using standard PCB technology and standard manufacturing processes.